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(parent: 3a539e0) | patch
clk: rockchip: rk3568: add more supported clk rates for sdmmc and emmc
authorVasily Khoruzhick <anarsoul@gmail.com>
Thu, 23 Feb 2023 21:03:32 +0000 (13:03 -0800)
committerKever Yang <kever.yang@rock-chips.com>
Tue, 28 Feb 2023 10:07:29 +0000 (18:07 +0800)
commitf0eb365e21d93d7d8b34cd84a8db2f26cab6ee9a
treeb490ec92a80da9b4ac464f4c3250d98216a85140tree | snapshot
parent3a539e0862e5ec996aaf7e2dfd8caa07a457bdd7commit | diff
clk: rockchip: rk3568: add more supported clk rates for sdmmc and emmc

SDHCI driver may attempt to set 26MHz clock, but clk_rk3568
will return error in this case. Apparently, SDHCI silently ignores the
error and as a result eMMC initialization fails.

Add 25 MHz and 26 MHz clk rates for sdmmc and emmc on rk3568 to fix that.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
drivers/clk/rockchip/clk_rk3568.c diff | blob | history
Domain: System / Kernel;