ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210
authorChanwoo Choi <cw00.choi@samsung.com>
Mon, 11 Apr 2016 03:57:54 +0000 (12:57 +0900)
committerKrzysztof Kozlowski <k.kozlowski@samsung.com>
Tue, 3 May 2016 10:22:58 +0000 (12:22 +0200)
commitf0ba9eaa9129043ce12cf97b1f8d6fad33934a40
treee21ce1df36066e53b63399ccb0edfca44c0f3e4b
parentaa99564d91a577538c1c6b9aea1fbc32769b38cd
ARM: dts: exynos: Add bus nodes using VDD_MIF for Exynos4210

This patch adds the bus nodes for Exynos4210 SoC. Exynos4210 SoC has
one power line for all buses to translate data between DRAM and sub-blocks.

Following list specifies the detailed relation between DRAM and sub-blocks:
- DMC/ACP clock for DMC (Dynamic Memory Controller)
- ACLK200 clock for LCD0
- ACLK100 clock for PERIL/PERIR/MFC(PCLK)
- ACLK160 clock for CAM/TV/LCD0/LCD1
- ACLK133 clock for FSYS/GPS
- GDL/GDR clock for LEFTBUS/RIGHTBUS
- SCLK_MFC clock for MFC

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
arch/arm/boot/dts/exynos4210.dtsi