AMDGPU: Fix phis from blocks split due to register indexing
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 21 Jul 2016 09:40:57 +0000 (09:40 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 21 Jul 2016 09:40:57 +0000 (09:40 +0000)
commitf0ba86a4d5eaec088a2c1747aebda35eff9c7433
tree9db0f7b75ba5e8fbb18ed4788ac9d3d0548e54c5
parent14086eae46a26c5d75d7712ea677e4b49e17546b
AMDGPU: Fix phis from blocks split due to register indexing

llvm-svn: 276257
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll