nir: intel/compiler: Add and use nir_op_pack_32_4x8_split
authorIan Romanick <ian.d.romanick@intel.com>
Tue, 26 Jan 2021 00:31:17 +0000 (16:31 -0800)
committerMarge Bot <eric+marge@anholt.net>
Wed, 18 Aug 2021 22:03:37 +0000 (22:03 +0000)
commitf0a8a9816afce4f30be64a8cdf7560a4282eb048
tree16129143e6d46cfe2024fbded131e840ab7d7209
parent89f639c0ca4fea53f2f6715435c0451d4f9bd74b
nir: intel/compiler: Add and use nir_op_pack_32_4x8_split

A lot of CTS tests write a u8vec4 or an i8vec4 to an SSBO.  This results
in a lot of shifts and MOVs.  When that pattern can be recognized, the
individual 8-bit components can be packed much more efficiently.

v2: Rebase on b4369de27fc ("nir/lower_packing: use
shader_instructions_pass")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9025>
src/compiler/nir/nir.h
src/compiler/nir/nir_lower_packing.c
src/compiler/nir/nir_opcodes.py
src/compiler/nir/nir_opt_algebraic.py
src/intel/compiler/brw_compiler.c
src/intel/compiler/brw_fs_nir.cpp