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[RISCV] Remove floating point condition code legalization from lowerFixedLengthVector...
authorCraig Topper <craig.topper@sifive.com>
Tue, 30 Mar 2021 16:11:54 +0000 (09:11 -0700)
committerCraig Topper <craig.topper@sifive.com>
Tue, 30 Mar 2021 16:11:56 +0000 (09:11 -0700)
commitf069000b433c3d08157a57b554a3a17c46cba04d
tree0981879b9ec3e7c7f2e88c1585314a4b36732fb3tree | snapshot
parent0bbe2a3c8aae29445b73423bd54baa72e515484dcommit | diff
[RISCV] Remove floating point condition code legalization from lowerFixedLengthVectorSetccToRVV.

After D98939, this is done by LegalizeVectorOps making this code dead.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D99519
llvm/lib/Target/RISCV/RISCVISelLowering.cpp diff | blob | history
Domain: System / Toolchain;