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(parent: 6fe2ecd) | patch
drm/amdgpu: switch to golden tsc registers for raven/raven2
authorJesse Zhang <jesse.zhang@amd.com>
Wed, 12 Apr 2023 10:17:32 +0000 (18:17 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 13 Apr 2023 04:19:18 +0000 (00:19 -0400)
commitf03eb1d26c2739b75580f58bbab4ab2d5d3eba46
tree5f6bcb29fe7a936c4bd318dad4c4a47738b4fe8atree | snapshot
parent6fe2ecdba34445a17049cda73a399d9685189efccommit | diff
drm/amdgpu: switch to golden tsc registers for raven/raven2

Due to raven/raven2 maybe enable  sclk slow down,
they cannot get clock count by the RLC at the auto level of dpm performance.
So switch to golden tsc register.

Suggested-by: shanshengwang <shansheng.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Jesse Zhang <jesse.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c diff | blob | history
Domain: System / Kernel;