pci root complex: support for tile architecture
authorChris Metcalf <cmetcalf@tilera.com>
Tue, 2 Nov 2010 16:05:10 +0000 (12:05 -0400)
committerChris Metcalf <cmetcalf@tilera.com>
Wed, 24 Nov 2010 18:13:49 +0000 (13:13 -0500)
commitf02cbbe657939489347cbda598401a56913ffcbd
tree0d21e68d899958e6549f908b0c715c6f37200027
parente5a06939736277c54a68ae275433db55b99d187c
pci root complex: support for tile architecture

This change enables PCI root complex support for TILEPro.  Unlike
TILE-Gx, TILEPro has no support for memory-mapped I/O, so the PCI
support consists of hypervisor upcalls for PIO, DMA, etc.  However,
the performance is fine for the devices we have tested with so far
(1Gb Ethernet, SATA, etc.).

The <asm/io.h> header was tweaked to be a little bit more aggressive
about disabling attempts to map/unmap IO port space.  The hacky
<asm/pci-bridge.h> header was rolled into the <asm/pci.h> header
and the result was simplified.  Both of the latter two headers were
preliminary versions not meant for release before now - oh well.

There is one quirk for our TILEmpower platform, which accidentally
negotiates up to 5GT and needs to be kicked down to 2.5GT.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
arch/tile/Kconfig
arch/tile/include/asm/io.h
arch/tile/include/asm/pci-bridge.h [deleted file]
arch/tile/include/asm/pci.h
arch/tile/kernel/Makefile
arch/tile/kernel/pci.c [new file with mode: 0644]
drivers/pci/Makefile
drivers/pci/quirks.c