projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 818e72d) | patch
[AMDGPU] [NFC]: Organize the code around reserving registers.
authorhsmahesha <mahesha.comp@gmail.com>
Wed, 23 Mar 2022 01:45:52 +0000 (07:15 +0530)
committerhsmahesha <mahesha.comp@gmail.com>
Wed, 23 Mar 2022 01:45:59 +0000 (07:15 +0530)
commitf014303e2ce410aa20517db612d91488e7a06d22
treeb12ca565cc38e3062a3634bea5ff4b2194e61175tree | snapshot
parent818e72d1b09bc5fc3b7a2c9f90b981a9c0d2a5dbcommit | diff
[AMDGPU] [NFC]: Organize the code around reserving registers.

First, add code to reserve all required special purpose registers,
followed by code to reserve SGPRs, followed by code to reserve
VGPRs/AGPRs.

This patch is prepared as a pre-requisite to fix an issue related to
GFX90A hardware.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D122219
llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp diff | blob | history
Domain: System / Toolchain;