review.tizen.org Git - platform/upstream/dotnet/runtime.git/commit

projects / platform / upstream / dotnet / runtime.git / commit

author	Egor Chesakov <Egor.Chesakov@microsoft.com>
	Tue, 24 Mar 2020 02:39:36 +0000 (19:39 -0700)
committer	GitHub <noreply@github.com>
	Tue, 24 Mar 2020 02:39:36 +0000 (19:39 -0700)
commit	eff37974b0dd3745df91646df97551c187861adf
tree	a0e79de7e1b9bf020e8a7193a6dd27d166035eea	tree \| snapshot
parent	ccada164f3a18207e91f1e3d0dc7c168ae3de0d4	commit \| diff

[Arm64] Implement more hardware intrinsics as proposed in #24794 (#33889)

- Implements the following intrinsics as proposed in #24794:

* AbsoluteDifferenceAdd

* MultiplyExtended, MultiplyExtendedScalar

* PolynomialMultiply

* ReciprocalEstimate, ReciprocalEstimateScalar

* ReciprocalExponentScalar

* ReciprocalSquareRootEstimate, ReciprocalSquareRootEstimateScalar

* ReciprocalSquareRootStep, ReciprocalSquareRootStepScalar

* ReciprocalStep, ReciprocalStepScalar

- Implements frecpe, frecps, frecpx, frsqrte, frsqrts, urecpe, ursqrte instructions

- Fixes implementation for fcmeq, fcmge, fcmgt, fcmle, fcmlt *(zero immediate)* instructions

- Adds missing flag BaseTypeFromFirstArg for AbsoluteDifference intrinsics

64 files changed:

src/coreclr/src/jit/codegenarm64.cpp		diff \| blob \| history
src/coreclr/src/jit/emitarm64.cpp		diff \| blob \| history
src/coreclr/src/jit/hwintrinsiclistarm64.h		diff \| blob \| history
src/coreclr/src/jit/instrsarm64.h		diff \| blob \| history
src/coreclr/src/jit/lsraarm64.cpp		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_r.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/AdvSimd.Arm64_ro.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/MultiplyExtended.Vector128.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/MultiplyExtended.Vector128.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/MultiplyExtended.Vector64.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/MultiplyExtendedScalar.Vector64.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/MultiplyExtendedScalar.Vector64.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/Program.AdvSimd.Arm64.cs		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/ReciprocalEstimate.Vector128.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/ReciprocalEstimateScalar.Vector64.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/ReciprocalEstimateScalar.Vector64.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/ReciprocalExponentScalar.Vector64.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/ReciprocalExponentScalar.Vector64.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/ReciprocalSquareRootEstimate.Vector128.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/ReciprocalSquareRootEstimateScalar.Vector64.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/ReciprocalSquareRootEstimateScalar.Vector64.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/ReciprocalSquareRootStep.Vector128.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/ReciprocalSquareRootStepScalar.Vector64.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/ReciprocalSquareRootStepScalar.Vector64.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/ReciprocalStep.Vector128.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/ReciprocalStepScalar.Vector64.Double.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd.Arm64/ReciprocalStepScalar.Vector64.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AbsoluteDifferenceAdd.Vector128.Byte.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AbsoluteDifferenceAdd.Vector128.Int16.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AbsoluteDifferenceAdd.Vector128.Int32.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AbsoluteDifferenceAdd.Vector128.SByte.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AbsoluteDifferenceAdd.Vector128.UInt16.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AbsoluteDifferenceAdd.Vector128.UInt32.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AbsoluteDifferenceAdd.Vector64.Byte.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AbsoluteDifferenceAdd.Vector64.Int16.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AbsoluteDifferenceAdd.Vector64.Int32.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AbsoluteDifferenceAdd.Vector64.SByte.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AbsoluteDifferenceAdd.Vector64.UInt16.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AbsoluteDifferenceAdd.Vector64.UInt32.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_r.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/AdvSimd_ro.csproj		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/PolynomialMultiply.Vector128.Byte.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/PolynomialMultiply.Vector128.SByte.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/PolynomialMultiply.Vector64.Byte.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/PolynomialMultiply.Vector64.SByte.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/Program.AdvSimd.cs		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/ReciprocalEstimate.Vector128.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/ReciprocalEstimate.Vector128.UInt32.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/ReciprocalEstimate.Vector64.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/ReciprocalEstimate.Vector64.UInt32.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/ReciprocalSquareRootEstimate.Vector128.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/ReciprocalSquareRootEstimate.Vector128.UInt32.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/ReciprocalSquareRootEstimate.Vector64.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/ReciprocalSquareRootEstimate.Vector64.UInt32.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/ReciprocalSquareRootStep.Vector128.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/ReciprocalSquareRootStep.Vector64.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/ReciprocalStep.Vector128.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/AdvSimd/ReciprocalStep.Vector64.Single.cs	[new file with mode: 0644]	blob
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/GenerateTests.csx		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/Helpers.cs		diff \| blob \| history
src/coreclr/tests/src/JIT/HardwareIntrinsics/Arm/Shared/Helpers.tt		diff \| blob \| history
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.PlatformNotSupported.cs		diff \| blob \| history
src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.cs		diff \| blob \| history
src/libraries/System.Runtime.Intrinsics.Experimental/ref/System.Runtime.Intrinsics.Experimental.cs		diff \| blob \| history

Domain: Dotnet / Core;

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