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arm64: dts: ti: k3-j7200-som-p0: Add nodes for OSPI0
authorPratyush Yadav <p.yadav@ti.com>
Fri, 5 Mar 2021 15:39:26 +0000 (21:09 +0530)
committerNishanth Menon <nm@ti.com>
Thu, 11 Mar 2021 14:12:45 +0000 (08:12 -0600)
commitefbdf2e9183bd5e75c64d251c6b673ca61ea01b3
treec835139ab1c1ff745b6489e0815b1c03802f6431tree | snapshot
parent7c172b30a540644fa53051e947d6712be5d6d6cecommit | diff
arm64: dts: ti: k3-j7200-som-p0: Add nodes for OSPI0

TI J7200 has the Cadence OSPI controller for interfacing with OSPI
flashes. Add its node to allow using SPI flashes.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210305153926.3479-4-p.yadav@ti.com
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi diff | blob | history
arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi diff | blob | history
Domain: System / Kernel;