AMDGPU/GlobalISel: Legalize s16 add/sub/mul
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 1 Jul 2019 18:18:55 +0000 (18:18 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 1 Jul 2019 18:18:55 +0000 (18:18 +0000)
commitef59cb69822147d1d35c99e368e454425c4f7426
treeffdebbf705c8c2a5a0f974a3a7a390daa8a80210
parent55d2e6f1c26c5dc73815e67733db0e91c10f05c7
AMDGPU/GlobalISel: Legalize s16 add/sub/mul

If this is scalar, promote to s32. Use a new observer class to assign
the register bank of newly created registers.

llvm-svn: 364827
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir