[AArch64][GlobalISel] Avoid copies to target register bank for subregister copies
authorJessica Paquette <jpaquette@apple.com>
Thu, 5 Mar 2020 18:57:52 +0000 (10:57 -0800)
committerJessica Paquette <jpaquette@apple.com>
Thu, 5 Mar 2020 19:13:02 +0000 (11:13 -0800)
commitef4282e0ee2d6539bbb92447a7464d9d089409f1
tree3f9e2ca4c8ccbfad1310b91e0040830373648e7a
parent3e851f4a688c42315355aae743b403dddeba9860
[AArch64][GlobalISel] Avoid copies to target register bank for subregister copies

Previously for any copy from a register bigger than the destination:

Copied to a same-sized register in the destination register bank.
Subregister copy of that to the destination.
This fails for copies from 128-bit FPRs to GPRs because the GPR register bank
can't accomodate 128-bit values.

Instead of special-casing such copies to perform the truncation beforehand in
the source register bank, generalize this:
a) Perform a subregister copy straight from source register whenever possible.
This results in shorter MIR and fixes the above problem.

b) Perform a full copy to target bank and then do a subregister copy only if
source bank can't support target's size. E.g. GPR to 8-bit FPR copy.

Patch by Raul Tambre (tambre)!

Differential Revision: https://reviews.llvm.org/D75421
llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
llvm/test/CodeGen/AArch64/GlobalISel/load-wro-addressing-modes.mir
llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-and-tbz-tbnz.mir
llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-ext-tbz-tbnz.mir
llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-shift-tbz-tbnz.mir
llvm/test/CodeGen/AArch64/GlobalISel/subreg-copy.mir [new file with mode: 0644]