ARM: realview: set up cache correctly on the PB11MPCore
authorLinus Walleij <linus.walleij@linaro.org>
Wed, 30 Dec 2015 20:05:09 +0000 (21:05 +0100)
committerArnd Bergmann <arnd@arndb.de>
Thu, 31 Dec 2015 15:49:17 +0000 (16:49 +0100)
commitef2a27059226327228238a55208d8c11b80013c9
treeaa001b3ed3716e227c45a668be9190aeb892f1be
parentf0dba77620368d154bff9542675c6844e4678761
ARM: realview: set up cache correctly on the PB11MPCore

The L2 cache comes up in a "safe mode" on the PB11MPCore, as
it has several issues. This sets it up properly with the right
size and associativity, also requiring the outer sync to be
disabled for the machine to boot properly.

Cc: Russell King <linux@arm.linux.org.uk>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arch/arm/boot/dts/arm-realview-pb11mp.dts