ARM: dts: dra7: Correct clock tree for sys_32k_ck
authorKeerthy <j-keerthy@ti.com>
Mon, 4 Apr 2016 05:37:15 +0000 (11:07 +0530)
committerTony Lindgren <tony@atomide.com>
Fri, 8 Apr 2016 16:02:39 +0000 (09:02 -0700)
commiteea08802f586acd6aef377d1b4a541821013cc0b
tree59de34fc932a500f351ad13efd49202723386785
parentec490f6f600f93236f1ad439b9809de563343b2c
ARM: dts: dra7: Correct clock tree for sys_32k_ck

This is w.r.t J6/J6eco: 32clk is pseudo (erratum i856) - clock source.
Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz external
crystal is not enabled at power up. Instead the CPU falls back to using
an emulation for the 32KHz clock which is SYSCLK1/610.  SYSCLK1 is usually
20MHz on boards so far (which gives an emulated frequency of 32.786KHz)

Modelling the same in device tree.

Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/dra7xx-clocks.dtsi