projects / platform / upstream / mesa.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 10bf0c5) | patch
ir3: prohibit folding of half->full conversion into mul.s24/u24
authorDanylo Piliaiev <dpiliaiev@igalia.com>
Thu, 19 Aug 2021 11:53:23 +0000 (14:53 +0300)
committerMarge Bot <eric+marge@anholt.net>
Fri, 20 Aug 2021 11:46:14 +0000 (11:46 +0000)
commitee9f0e78c175416b5523cb086517bf7304109aa7
tree85d7b6a77051330a314abeb3c2dd43023d2bfa34tree | snapshot
parent10bf0c51d4cdf30cbbb3fa408d196312afda5c82commit | diff
ir3: prohibit folding of half->full conversion into mul.s24/u24

mul.s24/u24 always return 32b result regardless of its sources size,
hence we cannot guarantee the high 16b of dst being zero or sign extended.

Fixes cts tests on a650:
 dEQP-VK.spirv_assembly.type.scalar.i16.mul_test_high_part_zero_*

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12471>
src/freedreno/ir3/ir3_cf.c diff | blob | history
Domain: Graphics System / GL;