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(parent: 697a877) | patch
RISC-V: Add vwmul C api tests
authorJu-Zhe Zhong <juzhe.zhong@rivai.ai>
Tue, 7 Feb 2023 06:32:24 +0000 (14:32 +0800)
committerKito Cheng <kito.cheng@sifive.com>
Sun, 12 Feb 2023 05:58:42 +0000 (13:58 +0800)
commitee4f91db8ee78cec4e7a70b425475ac89b9f2f86
tree6c35a96c9a462a35930ae4d52578656ab9cbf6e4tree | snapshot
parent697a877279b0f9d3827929f08028aec6964a469ecommit | diff
RISC-V: Add vwmul C api tests

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/vwmul_vv-1.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv-2.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv-3.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_m-1.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_m-2.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_m-3.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vv_tumu-3.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx-1.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx-2.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx-3.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_m-1.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_m-2.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_m-3.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_mu-1.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_mu-2.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_mu-3.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_tu-1.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_tu-2.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_tu-3.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_tum-1.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_tum-2.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_tum-3.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_tumu-1.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_tumu-2.c: New test.
* gcc.target/riscv/rvv/base/vwmul_vx_tumu-3.c: New test.
36 files changed:
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_m-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_m-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_m-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_mu-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_mu-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_mu-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_tu-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_tu-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_tu-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_tum-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_tum-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_tum-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_tumu-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_tumu-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vv_tumu-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_m-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_m-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_m-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_mu-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_mu-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_mu-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_tu-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_tu-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_tu-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_tum-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_tum-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_tum-3.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_tumu-1.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_tumu-2.c [new file with mode: 0644] blob
gcc/testsuite/gcc.target/riscv/rvv/base/vwmul_vx_tumu-3.c [new file with mode: 0644] blob
Domain: System / Toolchain;