projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 8b33839) | patch
[RISCV][Docs] Add description about inline asm constraint for V.
authorHsiangkai Wang <kai.wang@sifive.com>
Fri, 23 Jul 2021 03:26:58 +0000 (11:26 +0800)
committerHsiangkai Wang <kai.wang@sifive.com>
Sat, 31 Jul 2021 21:58:17 +0000 (05:58 +0800)
commitee3aef93b73646ef98f0241498d807a4fb68b78c
tree30d0630acf12624ccc4232de8379be21829c66e0tree | snapshot
parent8b33839f010fe780fdaf68160be7c45d07fdfcadcommit | diff
[RISCV][Docs] Add description about inline asm constraint for V.

Add inline asm constraint 'vr' for vector registers and 'vm' for vector
mask registers.

Differential Revision: https://reviews.llvm.org/D106633
llvm/docs/LangRef.rst diff | blob | history
Domain: System / Toolchain;