genxml: Make 1-bit L3$ config register fields bool on Gen7
authorJason Ekstrand <jason@jlekstrand.net>
Mon, 15 Mar 2021 23:39:19 +0000 (18:39 -0500)
committerJordan Justen <jordan.l.justen@intel.com>
Tue, 16 Mar 2021 00:22:49 +0000 (17:22 -0700)
commitee395df3152bffb37f6a358a8b12f5aa613fcf20
tree047139c5c52d972246512cae0aa73d9c1a47fd04
parentb8ca39a80d37b765907f24ee473a6987c08303f7
genxml: Make 1-bit L3$ config register fields bool on Gen7

Otherwise, they look like booleans but, if you put a value other than
0/1 in them, the GenXML generator code will explode.

Fixes: b6875b0094c "anv: Drop has_slm in emit_l3_config for gen11+"
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9614>
src/intel/genxml/gen7.xml
src/intel/genxml/gen75.xml