drm/i915: Enable DPIO SUS clock gating on CHV
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 8 Jul 2015 20:45:57 +0000 (23:45 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 26 Aug 2015 12:37:24 +0000 (14:37 +0200)
commitee27921824e6ad0ca2d8e5abfa12cf4d853ded6c
tree1904356a78eb8ebfbec55dfd589fd7743e296662
parent0047eedc48869f8c7797dd10f0cf976ac34c1d33
drm/i915: Enable DPIO SUS clock gating on CHV

CHV has supports some form of automagic clock gating for the
DPIO SUS clock. We can simply enable the magic bits and the
hardware should take care of the rest.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Deepak S <deepak.s@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_runtime_pm.c