drm/amd/display: fix register write sequence for LINK_SQUARE_PATTERN
authorWenjing Liu <wenjing.liu@amd.com>
Fri, 15 Oct 2021 16:48:41 +0000 (12:48 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 3 Nov 2021 16:32:34 +0000 (12:32 -0400)
commitedcf52caa985c010d0a6022190c8e3d3980a0223
treec8d18307aa41d357465d624eb474818aaf87b556
parent589bd2f03f87563d6dc4f480d47e5aabc09e4784
drm/amd/display: fix register write sequence for LINK_SQUARE_PATTERN

[why&how]
write LINK_SQUARE_PATTERN_num + 1 for square pulse pattern.
Specs requirement to write this register prior to write LINK_QUAL_LANEX_SET.

Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
drivers/gpu/drm/amd/display/dc/dc_dp_types.h