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(parent: fe11344) | patch
rev16 instruction is being generated for a half word byte swap on a 32-bit input...
authorBiplob Mishra <biplob.mishra@arm.com>
Tue, 5 Apr 2022 12:43:02 +0000 (13:43 +0100)
committerBiplob Mishra <biplob.mishra@arm.com>
Tue, 5 Apr 2022 12:43:11 +0000 (13:43 +0100)
commitedb452020569c070f7a7b00a3c12504020b5df21
treed0b973fcec7128bb62805784a59c1cc6b17be811tree | snapshot
parentfe113442572d94703f42a5773c952001a62bfdaccommit | diff
rev16 instruction is being generated for a half word byte swap on a 32-bit input as a bswap+rotr. This is not true for a 64-bit input.

This patch implements the rev16 instruction for a AArch64 backend for a half word byte swap on a 64-bit input.

Differential Revision: https://reviews.llvm.org/D122643
llvm/lib/Target/AArch64/AArch64InstrInfo.td diff | blob | history
llvm/test/CodeGen/AArch64/arm64-rev.ll diff | blob | history
Domain: System / Toolchain;