ARM: DRA7: Add support for IO delay configuration
authorLokesh Vutla <lokeshvutla@ti.com>
Thu, 4 Jun 2015 11:12:36 +0000 (16:42 +0530)
committerTom Rini <trini@konsulko.com>
Fri, 12 Jun 2015 17:02:05 +0000 (13:02 -0400)
commiteda6fbcc8c715a48c6b19541fed684efa3c49dbb
tree0bfc814daffc5155fb6453d207e5776ac86347c9
parent61d383d0f761a8db2286e563a151fc9083543def
ARM: DRA7: Add support for IO delay configuration

On DRA7, in addition to the regular muxing of pins, an additional
hardware module called IODelay which is also expected to be
configured. This "IODelay" module has it's own register space that is
independent of the control module.

It is advocated strongly in TI's official documentation considering
the existing design of the DRA7 family of processors during mux or
IODelay recalibration, there is a potential for a significant glitch
which may cause functional impairment to certain hardware. It is
hence recommended to do muxing as part of IOdelay recalibration.

IODELAY recalibration sequence:
- Complete AVS voltage change on VDD_CORE_L
- Unlock IODLAY config registers.
- Perform IO delay calibration with predefined values.
- Isolate all the IOs
- Update the delay mechanism for each IO with new calibrated values.
- Configure PAD configuration registers
- De-isolate all the IOs.
- Relock IODELAY config registers.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm/cpu/armv7/omap-common/clocks-common.c
arch/arm/cpu/armv7/omap5/Makefile
arch/arm/cpu/armv7/omap5/dra7xx_iodelay.c [new file with mode: 0644]
arch/arm/cpu/armv7/omap5/prcm-regs.c
arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h [new file with mode: 0644]
arch/arm/include/asm/omap_common.h