drm/i915/perf: Add Wa_1508761755:dg2
authorUmesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Wed, 26 Oct 2022 22:20:57 +0000 (22:20 +0000)
committerJohn Harrison <John.C.Harrison@Intel.com>
Thu, 27 Oct 2022 19:36:49 +0000 (12:36 -0700)
commited6b25aa6fbf8855446efc7125e6b5d912b36ed3
treeea0189430918285ab5618ec7d7a3954244cbd94e
parent90981da6da8ce333c49d2748f925fc4ef566785f
drm/i915/perf: Add Wa_1508761755:dg2

Disable Clock gating in EU when gathering the events so that EU events
are not lost.

v2: Fix checkpatch issues
v3: User MCR helpers to write to MC reg
v4: Indent correctly (checkpatch)

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221026222102.5526-12-umesh.nerlige.ramappa@intel.com
drivers/gpu/drm/i915/gt/intel_gt_regs.h
drivers/gpu/drm/i915/i915_perf.c