drm/i915: Avoid div-by-zero on gen2
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 21 Apr 2021 15:33:58 +0000 (18:33 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 26 Apr 2021 20:53:44 +0000 (23:53 +0300)
commited52c62d386f764194e0184fdb905d5f24194cae
treefb0496e09c79ba310ac67ff7c70d11a4b56f5393
parentf1f7f5538b9f96bb42be5df0349c7e4ef7ff7a64
drm/i915: Avoid div-by-zero on gen2

Gen2 tiles are 2KiB in size so i915_gem_object_get_tile_row_size()
can in fact return <4KiB, which leads to div-by-zero here.
Avoid that.

Not sure i915_gem_object_get_tile_row_size() is entirely
sane anyway since it doesn't account for the different tile
layouts on i8xx/i915...

I'm not able to hit this before commit 6846895fde05 ("drm/i915:
Replace PIN_NONFAULT with calls to PIN_NOEVICT") and it looks
like I also need to run recent version of Mesa. With those in
place xonotic trips on this quite easily on my 85x.

Cc: stable@vger.kernel.org
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210421153401.13847-2-ville.syrjala@linux.intel.com
drivers/gpu/drm/i915/gem/i915_gem_mman.c