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(parent: 5a75ea5) | patch
drm/amdgpu: correct psp ucode arrary start address
authorHawking Zhang <Hawking.Zhang@amd.com>
Fri, 11 Jun 2021 16:51:22 +0000 (00:51 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Jun 2021 21:25:42 +0000 (17:25 -0400)
commited4454c3844b06f00b89102cf3fba40fc73139bd
treef3172878664dcae39fba142cdd3d695961d82c21tree | snapshot
parent5a75ea56e36937d7d01545c53fae91e234ea0de6commit | diff
drm/amdgpu: correct psp ucode arrary start address

For ASICs that need to load sys_drv_aux and sos_aux,
the sys_start_addr is not the start address of psp
ucode array because the sys_drv_aux and sos_aux actaully
located at the end of the ucode array, instead, the
psp ucode arrary start address should be sos_hdr +
sos_hdr_offset.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: John Clements <John.Clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c diff | blob | history
Domain: System / Kernel;