The upper bits of FIXUPIMMS{S,D} should come from src1 not dest.
authorliuhongt <hongtao.liu@intel.com>
Mon, 28 Jun 2021 11:27:23 +0000 (19:27 +0800)
committerliuhongt <hongtao.liu@intel.com>
Wed, 30 Jun 2021 01:07:46 +0000 (09:07 +0800)
commited392e9db434898eccec81edd85323d21d555fe9
treeddd6233e01166f13b02024ad1ec9e74e361513a0
parent652abe22205f268c90b3b15f28c56c030ef68a34
The upper bits of FIXUPIMMS{S,D} should come from src1 not dest.

gcc/ChangeLog:

PR target/101248
* config/i386/sse.md
(avx512f_sfixupimm<mode><sd_maskz_name><round_saeonly_name>):
Refined to ..
(avx512f_sfixupimm<mode><maskz_scalar_name><round_saeonly_name>):
this.
(avx512f_sfixupimm<mode>_mask<round_saeonly_name>"): Refined.
* config/i386/subst.md (maskz_scalar): New define_subst.
(maskz_scalar_name): New subst_attr.
(maskz_scalar_op5): Ditto.
(round_saeonly_maskz_scalar_op5): Ditto.
(round_saeonly_maskz_scalar_operand5): Ditto.

gcc/testsuite/ChangeLog

PR target/101248
* gcc.target/i386/pr101248.c: New test.
gcc/config/i386/sse.md
gcc/config/i386/subst.md
gcc/testsuite/gcc.target/i386/pr101248.c [new file with mode: 0644]