ARM: pxa: irq: fix handling of ICMR registers in suspend/resume
authorDaniel Mack <daniel@zonque.org>
Fri, 6 Jul 2018 20:15:00 +0000 (22:15 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 24 Aug 2018 11:12:37 +0000 (13:12 +0200)
commitecbef3e398c1df665e9e4429a44c2367364cfc4b
treeb646e85d2d59514d12d739d8b8779a43972f82b4
parentfb96d97a4af4007bf72ca42d9067092b74f5929f
ARM: pxa: irq: fix handling of ICMR registers in suspend/resume

[ Upstream commit 0c1049dcb4ceec640d8bd797335bcbebdcab44d2 ]

PXA3xx platforms have 56 interrupts that are stored in two ICMR
registers. The code in pxa_irq_suspend() and pxa_irq_resume() however
does a simple division by 32 which only leads to one register being
saved at suspend and restored at resume time. The NAND interrupt
setting, for instance, is lost.

Fix this by using DIV_ROUND_UP() instead.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm/mach-pxa/irq.c