perf/x86/intel/ds: Handle PEBS overflow for fixed counters
authorKan Liang <kan.liang@linux.intel.com>
Fri, 9 Mar 2018 02:15:41 +0000 (18:15 -0800)
committerIngo Molnar <mingo@kernel.org>
Wed, 25 Jul 2018 09:50:50 +0000 (11:50 +0200)
commitec71a398c1bf6d8188cb24ebab6f5202523d95e1
tree0ea75b413bc0c161571863df7d2779e029e58578
parent4f08b6255adb1e379b4fcc8d304ec1263d465677
perf/x86/intel/ds: Handle PEBS overflow for fixed counters

The pebs_drain() need to support fixed counters. The DS Save Area now
include "counter reset value" fields for each fixed counters.

Extend the related variables (e.g. mask, counters, error) to support
fixed counters. There is no extended PEBS in PEBS v2 and earlier PEBS
format. Only need to change the code for PEBS v3 and later PEBS format.

Extend the pebs_event_reset[] logic to support new "counter reset value" fields.

Increase the reserve space for fixed counters.

Based-on-code-from: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Cc: acme@kernel.org
Link: http://lkml.kernel.org/r/20180309021542.11374-3-kan.liang@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/events/intel/core.c
arch/x86/events/intel/ds.c
arch/x86/include/asm/intel_ds.h