x86/mce: Don't disable MCA banks when offlining a CPU on AMD
authorYazen Ghannam <yazen.ghannam@amd.com>
Tue, 13 Jun 2017 16:28:34 +0000 (18:28 +0200)
committerIngo Molnar <mingo@kernel.org>
Wed, 14 Jun 2017 05:32:09 +0000 (07:32 +0200)
commitec33838244c8535b23b8d24b167996fd1318bb68
tree09eead47a92bd03c99288bf8f3f4723fc0086e0e
parent86d2eac5a7045933a88c97f0453f22106bb90b54
x86/mce: Don't disable MCA banks when offlining a CPU on AMD

AMD systems have non-core, shared MCA banks within a die. These banks
are controlled by a master CPU per die. If this CPU is offlined then all
the shared banks are disabled in addition to the CPU's core banks.

Also, Fam17h systems may have SMT enabled. The MCA_CTL register is shared
between SMT thread siblings. If a CPU is offlined then all its sibling's
MCA banks are also disabled.

Extend the existing vendor check to AMD too.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
[ Fix up comment. ]
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/20170613162835.30750-8-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/mcheck/mce.c