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MIPS/BFD: Simplify register index calculation in BZ16_REG_FIELD
authorMaciej W. Rozycki <macro@imgtec.com>
Sun, 24 Jan 2016 00:55:13 +0000 (00:55 +0000)
committerMaciej W. Rozycki <macro@imgtec.com>
Sun, 24 Jan 2016 01:01:15 +0000 (01:01 +0000)
commiteb6b0cf45d7588eb147d90ce790254309a69613e
tree79defb43fd577f4641ccdb3011a8b54df3952f90tree | snapshot
parente67f83e590b8ce7a9912f665aa559cbc98c05de6commit | diff
MIPS/BFD: Simplify register index calculation in BZ16_REG_FIELD

Just mask higher bits off, which returns the same set of 3-bit register
encodings of { 0, 1, 2, 3, 4, 5, 6, 7 } for the allowed 5-bit encodings
of { 16, 17, 2, 3, 4, 5, 6, 7 }.  Input has already been validated with
OP16_VALID_REG.

bfd/
* elfxx-mips.c (BZ16_REG_FIELD): Simplify calculation.
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bfd/elfxx-mips.c diff | blob | history
Domain: System / Toolchain;