[AArch64] Avoid generating indexed vector instructions for Exynos
authorSebastian Pop <sebpop@gmail.com>
Sat, 8 Oct 2016 12:30:07 +0000 (12:30 +0000)
committerSebastian Pop <sebpop@gmail.com>
Sat, 8 Oct 2016 12:30:07 +0000 (12:30 +0000)
commiteb65d72d9cf0f39bcfa793ae6afa7a90022993a5
treede0f061299b2d8c570eefb4fab34ff23406dc0c8
parent83ebea4cb662be715bb1e08664a03163582e8a17
[AArch64] Avoid generating indexed vector instructions for Exynos

Avoid generating indexed vector instructions for Exynos. This is needed for
fmla/fmls/fmul/fmulx. For example, the instruction

  fmla v0.4s, v1.4s, v2.s[1]

is less efficient than the instructions

  dup v2.4s, v2.s[1]
  fmla v0.4s, v1.4s, v2.4s

Patch written by Abderrazek Zaafrani.

Differential Revision: https://reviews.llvm.org/D21571

llvm-svn: 283663
llvm/lib/Target/AArch64/AArch64.h
llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
llvm/lib/Target/AArch64/AArch64VectorByElementOpt.cpp [new file with mode: 0644]
llvm/lib/Target/AArch64/CMakeLists.txt
llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll