arm64: flush TLS registers during exec
authorWill Deacon <will.deacon@arm.com>
Thu, 11 Sep 2014 13:38:16 +0000 (14:38 +0100)
committerWill Deacon <will.deacon@arm.com>
Thu, 11 Sep 2014 17:34:58 +0000 (18:34 +0100)
commiteb35bdd7bca29a13c8ecd44e6fd747a84ce675db
tree67653a916c9f5afae04959601e3b45507d043f53
parent3d8afe3099ebc602848aa7f09235cce3a9a023ce
arm64: flush TLS registers during exec

Nathan reports that we leak TLS information from the parent context
during an exec, as we don't clear the TLS registers when flushing the
thread state.

This patch updates the flushing code so that we:

  (1) Unconditionally zero the tpidr_el0 register (since this is fully
      context switched for native tasks and zeroed for compat tasks)

  (2) Zero the tp_value state in thread_info before clearing the
      tpidrr0_el0 register for compat tasks (since this is only writable
      by the set_tls compat syscall and therefore not fully switched).

A missing compiler barrier is also added to the compat set_tls syscall.

Cc: <stable@vger.kernel.org>
Acked-by: Nathan Lynch <Nathan_Lynch@mentor.com>
Reported-by: Nathan Lynch <Nathan_Lynch@mentor.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/kernel/process.c
arch/arm64/kernel/sys_compat.c