drm/panel: simple: Specify bus width and flags for EDT displays
authorStefan Agner <stefan@agner.ch>
Thu, 8 Dec 2016 22:54:31 +0000 (14:54 -0800)
committerThierry Reding <treding@nvidia.com>
Thu, 26 Jan 2017 09:57:18 +0000 (10:57 +0100)
commiteaeebffa90f35e0f92658249b0e5c49ddfa89915
treed7fc3a84d0df5003c2bf02b5fe6c415a96758fe3
parente6c2f066d5ed5ba61d48d54b603698bad1c6a270
drm/panel: simple: Specify bus width and flags for EDT displays

The display has a 18-Bit parallel LCD interface, require DE to be
active high and data driven by the controller on falling pixel
clock edge (display samples on rising edge).

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/gpu/drm/panel/panel-simple.c