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(parent: 8c45f31) | patch
drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 22 Jun 2022 15:54:50 +0000 (18:54 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 7 Oct 2022 17:10:02 +0000 (20:10 +0300)
commiteadbd867177e1d72b2ff71b7ba0dffcae4dabc64
treeb5690e3b9fd1f9de9f064c1cc19d6e20ac824989tree | snapshot
parent8c45f31c320d0a49e5cd8621db07e4b3701c52a7commit | diff
drm/i915: Fix pipe gamma enable/disable vs. CxSR on gmch platforms

Like most other plane control register bits, the pipe gamma
enable bit is also blocked by CxSR. So make sure we kick the
machine out of CxSR before trying to change that bit.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220622155452.32587-8-ville.syrjala@linux.intel.com
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
drivers/gpu/drm/i915/display/intel_color.c diff | blob | history
Domain: System / Kernel;