pinctrl: sh-pfc: r8a7795: Fix SCIF_CLK_{A,B} pin's MOD_SEL assignment to MOD_SEL1...
authorTakeshi Kihara <takeshi.kihara.df@renesas.com>
Fri, 28 Jul 2017 11:41:15 +0000 (20:41 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 16 Aug 2017 12:26:25 +0000 (14:26 +0200)
commiteada11ac23438d368fd431eb8e902caa96b80902
tree2f861719da447e0b6b310ce4ed3d42d11d54d7ad
parent712f36fbb7738a60df0622e950726b6977dd41f3
pinctrl: sh-pfc: r8a7795: Fix SCIF_CLK_{A,B} pin's MOD_SEL assignment to MOD_SEL1 bit10

This patch fixes SCIF_CLK_{A,B} pin's MOD_SEL assignment from MOD_SEL1
bit11 to MOD_SEL1 bit10.

This is a correction to the incorrect implementation of IPSR register
pin assignment for R8A7795 ES2.0 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.53E or later.

Fixes: b205914c8f822ef2 ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/pinctrl/sh-pfc/pfc-r8a7795.c