[mlir] [mem2reg] Adapt to be pattern-friendly.
authorThéo Degioanni <theo.degioanni@nextsilicon.com>
Tue, 16 May 2023 08:35:00 +0000 (08:35 +0000)
committerTobias Gysi <tobias.gysi@nextsilicon.com>
Tue, 16 May 2023 08:35:13 +0000 (08:35 +0000)
commitead8e9d7953e817c52fdfaf7196dfeb2199dab26
treea4316f426b23b274c408c59041c0621f85c44355
parentdadb77b626cd04d749487b3e2711fb23e5d17200
[mlir] [mem2reg] Adapt to be pattern-friendly.

This revision modifies the mem2reg interfaces and algorithm to be more
omfortable to use as a pattern. The motivation behind this is that
currently the pattern needs to be applied to the scope op of the region
in which allocators should be promoted. However, a more natural way to
apply the pattern would be to apply it on the allocator directly. This
is not only clearer but easier to parallelize.

This revision changes the mem2reg pattern to operate this way. This
required restraining the interfaces to only mutate IR using
RewriterBase, as the previously used escape hatch is not granular enough
to match on the region that is modified only. This has the unfortunate
cost of preventing batching allocator promotion and making the block
argument adding logic more complex. Because batching no longer made any
sense, I made the internal analyzer/promoter decoupling private again.

This also adds statistics to the mem2reg infrastructure.

Reviewed By: gysit

Differential Revision: https://reviews.llvm.org/D150432
mlir/include/mlir/Interfaces/MemorySlotInterfaces.h
mlir/include/mlir/Interfaces/MemorySlotInterfaces.td
mlir/include/mlir/Transforms/Mem2Reg.h
mlir/include/mlir/Transforms/Passes.td
mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
mlir/lib/Dialect/MemRef/IR/MemRefMem2Reg.cpp
mlir/lib/Transforms/Mem2Reg.cpp
mlir/test/Dialect/LLVMIR/mem2reg-dbginfo.mlir
mlir/test/Dialect/LLVMIR/mem2reg.mlir
mlir/test/Dialect/MemRef/mem2reg-statistics.mlir [new file with mode: 0644]
mlir/test/Dialect/MemRef/mem2reg.mlir