[Arm64] Simplify logic for RMW hardware intrinsics (#34668)
authorEgor Chesakov <Egor.Chesakov@microsoft.com>
Thu, 9 Apr 2020 01:50:28 +0000 (18:50 -0700)
committerGitHub <noreply@github.com>
Thu, 9 Apr 2020 01:50:28 +0000 (18:50 -0700)
commiteac13cad5a716efc67f35c65e0efa6eba2feff00
tree00aa50bddc099f6679f616ecfa5e5baec72a793e
parent0b02d280a9d80b0ecdc858a948eb202e4be92653
[Arm64] Simplify logic for RMW hardware intrinsics (#34668)

* Make HW_Flag_NoRMWSemantics Intel-architecture specific and add HW_Flag_HasRMWSemantics on Arm64 in hwintrinsic.h

* Mark RMW intrinsics with the new flag in hwintrinsiclistarm64.h

* setTgtPref should be also enabled under FEATURE_HW_INTRINSICS - to allow preferential targetReg allocation on Arm64 in lsrabuild.cpp

* Redo LinearScan::BuildHWIntrinsic in lsraarm64.cpp

* Use HWIntrinsicInfo::HasRMWSemantics in GenTree::isRMWHWIntrinsic in gentree.cpp

* Remove SpecialCodeGen for ExtractAndNarrowHigh, Decrypt and Encrypt and add RMW specific codegen in hwintrinsiccodegenarm64.cpp hwintrinsiclistarm64.h
src/coreclr/src/jit/gentree.cpp
src/coreclr/src/jit/hwintrinsic.h
src/coreclr/src/jit/hwintrinsiccodegenarm64.cpp
src/coreclr/src/jit/hwintrinsiclistarm64.h
src/coreclr/src/jit/lsraarm64.cpp
src/coreclr/src/jit/lsrabuild.cpp