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net/mlx5e: Use inline MTTs in UMR WQEs
authorTariq Toukan <tariqt@mellanox.com>
Mon, 10 Jul 2017 09:52:36 +0000 (12:52 +0300)
committerSaeed Mahameed <saeedm@mellanox.com>
Fri, 30 Mar 2018 23:16:17 +0000 (16:16 -0700)
commitea3886cab76f1026a5db988fa6fad997e98f3a32
tree618f777b231ae9ff7f9a85ac1dd0850638f5a3d9tree | snapshot
parente4d86a4a58b436fca0ce084ea453cc0ec8c39bb4commit | diff
net/mlx5e: Use inline MTTs in UMR WQEs

When modifying the page mapping of a HW memory region
(via a UMR post), post the new values inlined in WQE,
instead of using a data pointer.

This is a micro-optimization, inline UMR WQEs of different
rings scale better in HW.

In addition, this obsoletes a few control flows and helps
delete ~50 LOC.

Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/en.h diff | blob | history
drivers/net/ethernet/mellanox/mlx5/core/en_main.c diff | blob | history
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c diff | blob | history
Domain: System / Kernel;