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(parent: 00be6d0) | patch
LLVM support for vector quad bit permute and gather instructions through builtins
authorNemanja Ivanovic <nemanja.i.ibm@gmail.com>
Thu, 11 Jun 2015 06:21:25 +0000 (06:21 +0000)
committerNemanja Ivanovic <nemanja.i.ibm@gmail.com>
Thu, 11 Jun 2015 06:21:25 +0000 (06:21 +0000)
commitea1db8a697c3454a32a4d0c2947b030421c86aa2
tree1e7b253538b8616e682d5a838d7dea9dabc50365tree | snapshot
parent00be6d0ff86a5328c13f3f88171b26097c8ed664commit | diff
LLVM support for vector quad bit permute and gather instructions through builtins

This patch corresponds to review:
http://reviews.llvm.org/D10096

This is the back end portion of the patch related to D10095.
The patch adds the instructions and back end intrinsics for:
vbpermq
vgbbd

llvm-svn: 239505
llvm/include/llvm/IR/IntrinsicsPowerPC.td diff | blob | history
llvm/lib/Target/PowerPC/PPCInstrAltivec.td diff | blob | history
llvm/test/CodeGen/PowerPC/builtins-ppc-p8vector.ll [new file with mode: 0644] blob
llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt diff | blob | history
llvm/test/MC/PowerPC/ppc64-encoding-vmx.s diff | blob | history
Domain: System / Toolchain;