clk: stm32mp1: Add parent_data to ETHRX clock
authorMarek Vasut <marex@denx.de>
Tue, 18 Jan 2022 20:29:55 +0000 (21:29 +0100)
committerStephen Boyd <sboyd@kernel.org>
Tue, 25 Jan 2022 01:17:31 +0000 (17:17 -0800)
commite9ed1ef18a37a97899dca8d5b2693d5c218bb774
tree3496c75c3a57b0399a5da857b0b2db07ff257e1a
parente33b88b6d7c212de866296dda6a19738c5a978a8
clk: stm32mp1: Add parent_data to ETHRX clock

Pass parent_data to ETHRX clock with new fw_name = "ETH_RX_CLK/ETH_REF_CLK".
By default, this change has no impact on the operation of the clock driver.
However, due to the fw_name, it permits DT to override ETHRX clock parent,
which might be needed in case the ETHRX clock are supplied by external clock
source.

Example of MCO2 supplying clock to ETH_RX_CLK via external pad-to-pad wire:
&rcc {
         clocks = <&rcc CK_MCO2>;
         clock-names = "ETH_RX_CLK/ETH_REF_CLK";
};

Note that while this patch permits to implement this rare usecase, the issue
with ethernet RX and TX input clock modeling on MP1 is far more complex and
requires more core plumbing.

[1] STM32MP1 Reference Manual RM0436 Rev 3, Page 574,
    Figure 83. Peripheral clock distribution for Ethernet
    https://www.st.com/resource/en/reference_manual/dm00327659-stm32mp157-advanced-armbased-32bit-mpus-stmicroelectronics.pdf

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Christophe Roullier <christophe.roullier@foss.st.com>
Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-clk@vger.kernel.org
Cc: linux-stm32@st-md-mailman.stormreply.com
Link: https://lore.kernel.org/r/20220118202958.1840431-2-marex@denx.de
Tested-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/clk-stm32mp1.c