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(parent: 44220fd) | patch
MIPS: perf: Add hardware perf events support for new Loongson-3
authorHuacai Chen <chenhc@lemote.com>
Thu, 30 Apr 2020 09:45:16 +0000 (17:45 +0800)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Thu, 30 Apr 2020 14:33:24 +0000 (16:33 +0200)
commite9dfbaaeef1c9fee3f3a898defc4562db20c2edf
tree73cd71bfe8ed176593346dfcc61ca881b478df8etree | snapshot
parent44220fd84f3fa25208a441ae7a2cf0cf44699655commit | diff
MIPS: perf: Add hardware perf events support for new Loongson-3

New Loongson-3 means Loongson-3A R2 (Loongson-3A2000) and newer CPUs.
Loongson-3 processors have three types of PMU types (so there are three
event maps): Loongson-3A1000/Loonngson-3B1000/Loongson-3B1500 is Type-1,
Loongson-3A2000/Loongson-3A3000 is Type-2, Loongson-3A4000+ is Type-3.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h diff | blob | history
arch/mips/kernel/perf_event_mipsxx.c diff | blob | history
Domain: System / Kernel;