clk: sunxi: make factors clock mux mask configurable
authorChen-Yu Tsai <wens@csie.org>
Mon, 20 Oct 2014 14:10:26 +0000 (22:10 +0800)
committerMaxime Ripard <maxime.ripard@free-electrons.com>
Tue, 21 Oct 2014 19:40:56 +0000 (21:40 +0200)
commite94f8cb32d47b157b2af1906eb965290e89ee3fe
tree192452c87d48dd90c9cb64f2b175cae0d1472ea1
parentf114040e3ea6e07372334ade75d1ee0775c355e1
clk: sunxi: make factors clock mux mask configurable

Some of the factors-style clocks on the A80 have different widths
for the mux values in the registers.

Add a .muxmask field to clk_factors_config to make it configurable.
Passing a bitmask instead of a width parameter will allow reuse
in case we support table-based muxes in the future.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
drivers/clk/sunxi/clk-factors.c
drivers/clk/sunxi/clk-factors.h
drivers/clk/sunxi/clk-mod0.c
drivers/clk/sunxi/clk-sun8i-mbus.c
drivers/clk/sunxi/clk-sunxi.c