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(parent: 0d76b71) | patch
arm64: zynqmp: Enable FPGA loading from SPL
authorMichal Simek <michal.simek@xilinx.com>
Mon, 5 Oct 2020 13:43:44 +0000 (15:43 +0200)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 27 Oct 2020 07:13:31 +0000 (08:13 +0100)
commite9284066958e906118b3fd71d7e81e9916b2c58a
tree9e3d5223fc098f91a3c5563f06e7887ca11844d8tree | snapshot
parent0d76b71d93f6d7740b973dbb50010dc8f7b347f0commit | diff
arm64: zynqmp: Enable FPGA loading from SPL

fpga bitstream needs to be listed in config node in FIT image. Only tested
option is bitstream in BIN format.
Enabling this feature increase code size by almost 4k.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
configs/xilinx_zynqmp_virt_defconfig diff | blob | history
Domain: System / Kernel;