riscv: Apply a static assert to riscv_isa_ext_id
authorAndrew Jones <ajones@ventanamicro.com>
Thu, 1 Dec 2022 11:37:50 +0000 (12:37 +0100)
committerPalmer Dabbelt <palmer@rivosinc.com>
Tue, 13 Dec 2022 06:21:25 +0000 (22:21 -0800)
commite923f4625ed3ad7656c3f9f086c898798bafbbc5
tree74a38b5b6659e88c3e8402a180b117ec8afead9f
parentc3ec1e8964fb0ca00c79936160a027bd8b47e140
riscv: Apply a static assert to riscv_isa_ext_id

Add a static assert to ensure a RISCV_ISA_EXT_* enum is never
created with a value >= RISCV_ISA_EXT_MAX. We can do this by
putting RISCV_ISA_EXT_ID_MAX to more work. Before it was
redundant with RISCV_ISA_EXT_MAX and hence only used to
document the limit. Now it grows with the enum and is used to
check the limit.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20221201113750.18021-1-ajones@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/hwcap.h