Correct ARM Versatile Timer Initialization
authorGururaja Hebbar K R <gururajakr@sanyo.co.in>
Mon, 25 Aug 2008 09:11:34 +0000 (11:11 +0200)
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Mon, 25 Aug 2008 11:00:03 +0000 (13:00 +0200)
commite8f1207bbf2df6fb693ee1aa3329b2014c92e5e6
tree5cc265595c6f75283f7e67e8d3a3ea5575afa868
parent535cfa4f3de86cf48d6c0af1daf33aebdca089f9
Correct ARM Versatile Timer Initialization

 - According to ARM Dual-Timer Module (SP804) TRM (ARM DDI0271),
   -- Timer Value Register @ TIMER Base + 4 is Read-only.
   -- Prescale Value (Bits 3-2 of TIMER Control register)
can only be one of 00,01,10. 11 is undefined.
   -- CFG_HZ for Versatile board is set to
#define CFG_HZ (1000000 / 256)
So Prescale bits is set to indicate
- 8 Stages of Prescale, Clock divided by 256
 - The Timer Control Register has one Undefined/Shouldn't Use Bit
   So we should do read/modify/write Operation

Signed-off-by: Gururaja Hebbar <gururajakr@sanyo.co.in>
cpu/arm926ejs/versatile/timer.c [changed mode: 0644->0755]