review.tizen.org Git - platform/upstream/llvm.git/commit

projects / platform / upstream / llvm.git / commit

author	Matt Arsenault <Matthew.Arsenault@amd.com>
	Wed, 14 Sep 2016 17:24:15 +0000 (17:24 +0000)
committer	Matt Arsenault <Matthew.Arsenault@amd.com>
	Wed, 14 Sep 2016 17:24:15 +0000 (17:24 +0000)
commit	e8e0f5cac6d80b489e58a369a5389387ff91d60a
tree	88f45d7f6dd53509e9a47978a841322cef0dc665	tree \| snapshot
parent	a2b036e88b8f31c4a2169c1d5634e21c9c8eb927	commit \| diff

Make analyzeBranch family of instruction names consistent

analyzeBranch was renamed to use lowercase first, rename
the related set to match.

llvm-svn: 281506

47 files changed:

llvm/include/llvm/Target/TargetInstrInfo.h		diff \| blob \| history
llvm/lib/CodeGen/BranchFolding.cpp		diff \| blob \| history
llvm/lib/CodeGen/EarlyIfConversion.cpp		diff \| blob \| history
llvm/lib/CodeGen/IfConversion.cpp		diff \| blob \| history
llvm/lib/CodeGen/ImplicitNullChecks.cpp		diff \| blob \| history
llvm/lib/CodeGen/MachineBasicBlock.cpp		diff \| blob \| history
llvm/lib/CodeGen/MachineBlockPlacement.cpp		diff \| blob \| history
llvm/lib/CodeGen/MachinePipeliner.cpp		diff \| blob \| history
llvm/lib/CodeGen/SelectionDAG/FastISel.cpp		diff \| blob \| history
llvm/lib/CodeGen/TailDuplicator.cpp		diff \| blob \| history
llvm/lib/CodeGen/TargetInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64BranchRelaxation.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/AArch64/AArch64InstrInfo.h		diff \| blob \| history
llvm/lib/Target/AMDGPU/R600InstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/R600InstrInfo.h		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/AMDGPU/SIInstrInfo.h		diff \| blob \| history
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/ARM/ARMBaseInstrInfo.h		diff \| blob \| history
llvm/lib/Target/AVR/AVRInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/AVR/AVRInstrInfo.h		diff \| blob \| history
llvm/lib/Target/BPF/BPFInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/BPF/BPFInstrInfo.h		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/Hexagon/HexagonInstrInfo.h		diff \| blob \| history
llvm/lib/Target/Lanai/LanaiInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/Lanai/LanaiInstrInfo.h		diff \| blob \| history
llvm/lib/Target/MSP430/MSP430InstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/MSP430/MSP430InstrInfo.h		diff \| blob \| history
llvm/lib/Target/Mips/MipsInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/Mips/MipsInstrInfo.h		diff \| blob \| history
llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/NVPTX/NVPTXInstrInfo.h		diff \| blob \| history
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/PowerPC/PPCInstrInfo.h		diff \| blob \| history
llvm/lib/Target/Sparc/SparcInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/Sparc/SparcInstrInfo.h		diff \| blob \| history
llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/SystemZ/SystemZInstrInfo.h		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h		diff \| blob \| history
llvm/lib/Target/X86/X86InstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/X86/X86InstrInfo.h		diff \| blob \| history
llvm/lib/Target/XCore/XCoreInstrInfo.cpp		diff \| blob \| history
llvm/lib/Target/XCore/XCoreInstrInfo.h		diff \| blob \| history

Domain: System / Toolchain;

RSS Atom