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[RISCV] Fix vfwcvt/vfncvt pseudos w/ rounding mode lowering
authorLuke Lau <luke@igalia.com>
Fri, 30 Jun 2023 16:44:47 +0000 (17:44 +0100)
committerLuke Lau <luke@igalia.com>
Fri, 30 Jun 2023 20:43:19 +0000 (21:43 +0100)
commite8e0f32958fafa43fb68573b09b710e6260fa9ad
treeec2cb009ef71928fb50df53c88c41fe36d940587tree | snapshot
parent781405e85e43e97f4e2aa55d2d139540fbd3fe82commit | diff
[RISCV] Fix vfwcvt/vfncvt pseudos w/ rounding mode lowering

Some signed opcodes were being lowered to their unsigned counterparts and
vice-versa.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D154234
llvm/lib/Target/RISCV/RISCVISelLowering.cpp diff | blob | history
llvm/test/CodeGen/RISCV/rvv/double-round-conv.ll diff | blob | history
llvm/test/CodeGen/RISCV/rvv/float-round-conv.ll diff | blob | history
llvm/test/CodeGen/RISCV/rvv/half-round-conv.ll diff | blob | history
Domain: System / Toolchain;