AMDGPU: Move d16 load matching to preprocess step
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 8 Mar 2019 20:58:11 +0000 (20:58 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 8 Mar 2019 20:58:11 +0000 (20:58 +0000)
commite8c03a25111054ee28ca71c2d75921589ef27861
tree9a645fe1d17a6013d0eeb0746be65134d9fe4bee
parentae56ff925bfd73511e60a6a6c84b279e0c4acca5
AMDGPU: Move d16 load matching to preprocess step

When matching half of the build_vector to a load, there could still be
a hidden dependency on the other half of the build_vector the pattern
wouldn't detect. If there was an additional chain dependency on the
other value, a cycle could be introduced.

I don't think a tablegen pattern is capable of matching the necessary
conditions, so move this into PreprocessISelDAG. Check isPredecessorOf
for the other value to avoid a cycle. This has a warning that it's
expensive, so this should probably be moved into an MI pass eventually
that will have more freedom to reorder instructions to help match
this. That is currently complicated by the lack of a computeKnownBits
type mechanism for the selected function.

llvm-svn: 355731
13 files changed:
llvm/lib/Target/AMDGPU/AMDGPU.td
llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
llvm/lib/Target/AMDGPU/BUFInstructions.td
llvm/lib/Target/AMDGPU/DSInstructions.td
llvm/lib/Target/AMDGPU/FLATInstructions.td
llvm/lib/Target/AMDGPU/SIInstrInfo.td
llvm/test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll
llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
llvm/test/CodeGen/AMDGPU/load-hi16.ll