KVM: LAPIC: Write 0 to TMICT should also cancel vmx-preemption timer
authorWanpeng Li <wanpengli@tencent.com>
Mon, 7 Jun 2021 07:19:43 +0000 (00:19 -0700)
committerPaolo Bonzini <pbonzini@redhat.com>
Tue, 8 Jun 2021 16:22:26 +0000 (12:22 -0400)
commite898da784aed0ea65f7672d941c01dc9b79e6299
tree32206b1e1480ff8574a97ef8f569444858c117a4
parent4f13d471e5d11034d56161af56d0f9396bc0b384
KVM: LAPIC: Write 0 to TMICT should also cancel vmx-preemption timer

According to the SDM 10.5.4.1:

  A write of 0 to the initial-count register effectively stops the local
  APIC timer, in both one-shot and periodic mode.

However, the lapic timer oneshot/periodic mode which is emulated by vmx-preemption
timer doesn't stop by writing 0 to TMICT since vmx->hv_deadline_tsc is still
programmed and the guest will receive the spurious timer interrupt later. This
patch fixes it by also cancelling the vmx-preemption timer when writing 0 to
the initial-count register.

Reviewed-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Wanpeng Li <wanpengli@tencent.com>
Message-Id: <1623050385-100988-1-git-send-email-wanpengli@tencent.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/kvm/lapic.c