testsuite/arm: Improve mve-vshr.c
authorChristophe Lyon <christophe.lyon@linaro.org>
Mon, 17 May 2021 11:57:30 +0000 (11:57 +0000)
committerChristophe Lyon <christophe.lyon@linaro.org>
Mon, 17 May 2021 11:57:30 +0000 (11:57 +0000)
commite87d568e9e3e331e22850127308abedd0642e5e8
treee4ccde636c98bec16e1b4a4b7de5096e474d6104
parent325187841aa66f0d03403d41fe9e696d094588b9
testsuite/arm: Improve mve-vshr.c

Vector right shifts by immediate use vshr, while right shifts by
vectors instead use vneg and vshl.

This patch adds the corresponding scan-assembler-times that were
missing.

2021-05-17  Christophe Lyon  <christophe.lyon@linaro.org>

gcc/testsuite/
* gcc.target/arm/simd/mve-vshr.c: Add more scan-assembler-times.
gcc/testsuite/gcc.target/arm/simd/mve-vshr.c